1. Field of the Invention
The present invention relates to the field of computer networks, in particular, the network interfaces of the networked computer systems. More specifically, the present invention relates to high performance cell based network interfaces and the underlying technology for implementing these high performance network interfaces.
2. Art Background
Traditionally, in a computer system network, computer systems are physically connected to each other via media connected to the network interfaces of the computer systems. Various approaches have been developed in the art to transfer data between the computer systems. Typically, each network interface comprises a small number of DMA channels, each having a predetermined bandwidth, for transferring data. The network services of the operating systems running on these computer systems handle the physical transfer of data between the computer systems in the predetermined bandwidth rates in accordance to pre-established protocols. The applications running on the computer systems are shielded from the physical details. The applications manage the transfer data at the data structure level.
For a large computer system network, it is often desirable to connect the computer systems to each other via switches. The switches may include public and local switches. A computer system is connected to a local switch via its network interface and a medium. The local switch is in turn directly or indirectly coupled to a public switch. The public switches are coupled to each other. For such large computer system networks, it is further desirable for the switches to be able to transfer data between the computer systems asynchronously. Thus, a number of cell based asynchronous transfer approaches for transferring data between computer systems in a large computer system network have emerged in the art. However, due to the small number of DMA channels, the traditional network interface severely limits the performance gain of these cell based asynchronous transfer approaches.
Traditional DMA channels are typically register based. Each additional channel typically requires a complete replication of the register set and related resources. Thus, it is costly, particularly in terms of hardware real estate, to increase the number of these register based DMA channels in a network interface. It is virtually impractical to have hundreds of register based DMA channels. Therefore, it is desirable if a large number of DMA channels can be provided for these cell based asynchronous transfer approaches in a less costly manner.
Additionally, it is not uncommon for many applications running on these computer systems, such as multimedia applications, wanting to use different bandwidths for transferring data among applications. Therefore, it is further desirable for these network interfaces to support multiple selectable bandwidth groups for these cell based asynchronous transfer approaches.
Traditional cell based asynchronous transfer approaches typically cellify and reassemble the transfer data packet at the network interface level. Cellification and reassembly of the transfer data packet at the network interface level has at least three disadvantages. One, it imposes greater storage requirement on the network interface. Two, transmission of the transfer data cannot start until the entire data packet has been segmented. Three, the received data are not available until the entire data packet has been reassembled. Thus, it is further desirable if the transfer data can be transmitted and made available as the transfer data packet is being segmented and reassembled.
Additionally, for data integrity, most cell based asynchronous transfer approaches include some form of cyclic redundancy check (CRC). Typically, the CRC calculations are performed at the packet level. Thus, it is further desirable if transfer data can be transmitted and made available as the transfer data packet is being segmented and reassembled, data integrity check that is equivalent to the traditional CRC can still be provided.
As will be disclosed, the present invention provides an asynchronous transfer mode network interface that achieves the desired results described above, using memory based DMA channels, bandwidth group table, host based cellification and reassembly of data packets, partial CRC calculations, and cell tags.